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 TECHNICAL DATA
Hex Schmitt-Trigger Inverter
High-Speed Silicon-Gate CMOS
The KK74ACT14 is identical in pinout to the LS/ALS14, HC/HCT14. The KK74ACT14 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. The KK74ACT14 is useful to "square up" slow input rise and fall times. Due to the hysteresis voltage of the Schmitt trigger, the KK74ACT14 finds applications in noisy environments. * TTL/NMOS Compatible Input Levels * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 4.5 to 5.5 V * Low Input Current: 1.0 A; 0.1 A @ 25C * Outputs Source/Sink 24 mA
KK74ACT14
ORDERING INFORMATION KK74ACT14N Plastic KK74ACT14D SOIC TA = -40 to 85 C for all packages
LOGIC DIAGRAM PIN ASSIGNMENT
FUNCTION TABLE
Inputs A L H PIN 14 =VCC PIN 7 = GND Output Y H L
1
KK74ACT14
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 750 500 -65 to +150 260
Unit V V V mA mA mA mW C C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TJ TA IOH IOL tr, tf
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Junction Temperature (PDIP) Operating Temperature, All Package Types Output Current - High Output Current - Low Input Rise and Fall Time (except Schmitt Inputs)
*
Min 4.5 0 -40
Max 5.5 VCC 140 +85 -24 24
Unit V V C C mA mA ns/V
VCC =4.5 V VCC =5.5 V
0 0
10 8.0
VIN from 0.8 V to 2.0 V
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
2
KK74ACT14
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC Symbol VOH Parameter Minimum High-Level Output Voltage Test Conditions IOUT -50 A VIN VT - min IOH=-12 mA IOH=-24 mA IOH=-24 mA
*
Guaranteed Limits 25 C 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 2.0 2.0 0.8 0.8 1.2 1.2 0.4 0.4 0.1 1.0 1.5 75 -75 4.0 40 -40C to 85C 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 V V Unit V
V 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 5.5 5.5 5.5 5.5 5.5
VOL
Maximum Low-Level Output Voltage
IOUT 50 A
*
VIN= VT +max IOL=12 mA IOL=24 mA IOL=24 mA
VT +max
Maximum PositiveGoing Input Threshold Voltage Minimum NegativeGoing Input Threshold Voltage Maximum Hysteresis Voltage Minimum Hysteresis Voltage Maximum Input Leakage Current Addition Quiescent Supply Current +Minimum Dynamic Output Current +Minimum Dynamic Output Current Maximum Quiescent Supply Current (per Package)
VOUT =0.1 V TA = Worst Case VOUT = VCC - 0.1 V TA = Worst Case VOUT =0.1 V or VCC - 0.1 V TA = Worst Case VOUT =0.1 V or VCC - 0.1 V TA = Worst Case VIN=VCC or GND VIN=VCC -2.1 V VOLD=1.65 V Max VOHD=3.85 V Min VIN=VCC or GND
VT - min
V
VH max VH min IIN ICC IOLD IOHD ICC
V V A mA mA mA A
*
All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2.0 ms, one output loaded at a time. Note: VH=(VT+)-(VT-) .
3
KK74ACT14
AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V 10%, CL=50pF,Input tr=tf=3.0 ns)
Guaranteed Limits Symbol Parameter 25 C Min tPLH tPHL CIN Propagation Delay, Input A to Output Y (Figure 1) Propagation Delay, Input A to Output Y (Figure 1) Maximum Input Capacitance 1.5 1.5 4.5 Max 11.5 10.0 -40C to 85C Min 1.0 1.0 4.5 Max 12.5 11.0 ns ns pF Unit
Typical @25C,VCC=5.0 V CPD Power Dissipation Capacitance 25 pF
Figure 1. Switching Waveforms
4
KK74ACT14
N SUFFIX PLASTIC DIP (MS - 001AA)
A 14 8 B 1 7
Dimension, mm Symbol A B C MIN 18.67 6.1 MAX 19.69 7.11 5.33 0.36 1.14 2.54 7.62 0 2.92 7.62 0.2 0.38 10 3.81 8.26 0.36 0.56 1.78
F
L
D F
C -T- SEATING N G D 0.25 (0.010) M T K
PLANE
G H
H J
M
J K L M N
NOTES: 1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC (MS - 012AB) Dimension, mm
8
A 14
Symbol A
MIN 8.55 3.8 1.35 0.33 0.4 1.27 5.27 0 0.1 0.19 5.8 0.25
MAX 8.75 4 1.75 0.51 1.27
H
B
P
B C
1
G
7 C R x 45
D F G
-TD 0.25 (0.010) M T C M K
SEATING PLANE
H
J F M
J K M P R
8 0.25 0.25 6.2 0.5
NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B 0.25 mm (0.010) per side.
5


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